tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 280

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DMA Controller (DMAC)
DTCRn
10.3.8
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
5 : 3
2 : 0
Bit
DMA Transfer Control Register (DTCRn)
Mnemonic
DACM
SACM
Fig. 10.10 DMA Transfer Control Register (DTCRn)
15
23
31
7
Destination address
count mode
Source address count
mode
TMP19A44 (rev1.3) 10-17
Field name
22
30
14
6
13
21
29
5
See detailed description.
Destination Address Count Mode
Specifies the count mode of the destination address.
000: Counting begins from bit 0
001: Counting begins from bit 4
010: Counting begins from bit 8
011: Counting begins from bit 12
100: Counting begins from bit 16
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
Source Address Count Mode
Specifies the count mode of the source address.
000: Counting begins from bit 0
001: Counting begins from bit 4
010: Counting begins from bit 8
011: Counting begins from bit 12
100: Counting begins from bit 16
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
DACM
R/W
12
20
28
4
0
0
0
0
11
19
27
3
Description
10
18
26
2
See detailed description.
TMP19A44
SACM
R/W
17
25
1
9
2010-04-01
16
24
0
8