tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 150

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Input/Output Ports
7.1 Port 0 (P00 through P07)
The port 0 is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can be specified in units
of bits by using the control register P0CR. A reset allows all bits of P0CR to be cleared to "0" and the port 0 to
be put in input mode.
Besides the general-purpose input/output function, the port 0 performs other functions: D0 through D7 function
as a data bus and AD0 through AD7 function as an address data bus.
If the BUSMD pin (port P45) is set to "L" level during a reset, the port 0 is put in separate bus mode (D0 to D7).
If it is set to "H" level during a reset, the port 0 is put in multiplexed mode (AD0 to AD7).
D0~D7
Drive disabled
during STOP/ RESET
P0PUP
P0 read
(Pull-up
control)
(direction
P0FC1
(function
P0CR
control)
control)
(output
latch)
P0
D0~D7/
AD0~AD7 1
Fig. 7.1 Port 0 (P00 through P07)
Address/ data output
enable
TMP19A44 (rev1.3) 7-2
External bus opening
0
1
0
External read
P0 read
PORT KEEP
External read
TMP19A44
2010-04-01
Port 0
P00~P07
(D0~D7)
(AD0~AD7)
RESET