tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 349

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

PHCnFLG
(0xFF00_1xxC)
13.4.4 Status register (PHCnFLG)
* These bits are not automatically cleared. Initialize them before use. Writing “1” to each bit clears its flag.
<CMP0>: Flag for an interrupt generated if there is a match with compare register 0 (PHCCMP0)
<CMP1>: Flag for an interrupt generated if there is a match with compare register 1 (PHCCMP1)
<OVF> : Flag for an overflow interrupt of an up-and-down counter.
<UDF> : Flag for an underflow interrupt of an up-and-down counter.
Two-phase Pulse Input Counter (PHCNT)
bit Symbol
Read/Write
After reset
Read/Write
After reset
Read/Write
After reset
Read/Write
After reset
Function
Function
Function
Function
“0” can be read.
15
23
31
7
14
22
30
6
－
R
0
13
21
29
5
TMP19A44(rev1.3)13-9
“0” can be read.
“0” can be read.
“0” can be read.
12
20
28
4
R
R
R
0
0
0
Underflow
interrupt
0:
generated
1:
Generated
UDFn
R/W
11
19
27
3
0
Not
Overflow
interrupt
0:
generated
1:
Generated
OVFn
R/W
10
18
26
2
0
Not
An interrupt
generated if
there is a
match with
compare
register 1
0:
generated
1:
Generated
CMPn1
R/W
17
25
0
1
9
TMP19A44
Not
An interrupt
generated if
there is a
match
compare
register 0
0:
generated
1:
Generated
CMPn0
2010-05-10
R/W
16
24
0
0
8
with
Not