tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 269

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DMA Controller (DMAC)
DCR
(0xFF00_1300)
10.3.1
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
Bit
31
DMA Control Register (DCR)
7
6
5
Mnemonic
Rstall
Rst7
Rst6
Rst5
See
detailed
description.
Rstall
Rst7
15
23
31
7
Reset all
Reset 7
Reset 6
Reset 5
TMP19A44 (rev1.3) 10-6
Field name
Rst6
14
22
30
6
Rst5
13
21
29
5
Performs a software reset of the DMAC. If the Rstall bit is
set to 1, the values of all the internal registers of the DMAC
are reset to their initial values. All transfer requests are
canceled and all eight channels go into an idle state.
0: Don't care
1: Initializes the DMAC
Performs a software reset of the DMAC channel 7. If the
Rst7 bit is set to 1, internal registers of the DMAC channel 7
and a corresponding bit of the channel 7 of the RSR register
are reset to their initial values. The transfer request of the
channel 7 is canceled and the channel 7 goes into an idle
state.
0: Don't care
1: Initializes the DMAC channel 7
Performs a software reset of the DMAC channel 6. If the
Rst6 bit is set to 1, internal registers of the DMAC channel 6
and a corresponding bit of the channel 6 of the RSR register
are reset to their initial values. The transfer request of the
channel 6 is canceled and the channel 6 goes into an idle
state.
0: Don't care
1: Initializes the DMAC channel 6
Performs a software reset of the DMAC channel 5. If the
Rst5 bit is set to 1, internal registers of the DMAC channel 5
and a corresponding bit of the channel 5 of the RSR register
are reset to their initial values. The transfer request of the
channel 5 is canceled and the channel 5 goes into an idle
state.
0: Don't care
1: Initializes the DMAC channel 5
See detailed description.
Rst4
12
20
28
4
W
W
W
W
0
0
0
0
Rst3
11
19
27
3
Description
Rst2
10
18
26
2
TMP19A44
Rst1
17
25
1
9
2010-04-01
Rst0
16
24
0
8