tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 167

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

TMP19A44
7.6 Port 5 (P50 through P57)
The port 5 is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can be specified in units
of bits by using the control register P5CR and the function registers P5FC1, P5FC2 and P5FC3. A reset allows
all bits of the output latch P5 to be set to "1," all bits of P5CR, P5FC1, P5FC2 and P5FC3 to be cleared to "0,"
and the port 5 to be put in input mode.
Besides the input/output port function, the port 5 performs other functions: P50 through P53 input external
interrupts, P54 through P57 output a 16-bit timer, and P56 and P57 input the key-on wake-up. These functions
are enabled by setting the corresponding bit of P5FC to "1."
The port 5 also functions as an address bus (A0 through A7). To access external memory, P5CR and P5FC must
be provisioned to allow the port 5 to function as an address bus. This address bus function can be used only in
separate bus mode. (To put the port 5 in separate bus mode, the BUSMD pin (port 45) must be set to "L" level
during a reset.)
Input/Output Ports
TMP19A44 (rev1.3) 7-19
2010-04-01