tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 424

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Serial Channel (HSIO)
(1) Input clock
(2) UART mode
15.4.1.2
The input clock selection is made by setting the baud rate generator control register, HBR0CR
<BR0CK5:0>.
Specify the divide ratio of the output clock with the baud rate generator control register
HBR0CR<BR0ADDE><BR0S3:0> and the baud rate generator control register 2 HBR0ADD<BR0K3:0>.
The baud rate generator generates transmit and receive clocks.
Baud Rate Generator
HBR0CR<BR0ADDE>
N+
(16 −
16
“0”
“1”
K)
division
TMP19A44(rev1.3) 15-34
Table 15.6 UART mode
HBR0ADD<BR0K3:0>
（K=1,2,3…15）
Set divide ratio “K”
Setting invalid
Setting valid
－
N=1,64: setting prohibited
HBR0CR<BR0S3:0>
Set divide ratio “N”
Set divide ratio “N”
（N=1,2,3…64）
（N=2,3…63）
Setting valid
Setting valid
TMP19A44
2010-04-01