tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 278

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

DMA Controller (DMAC)
DARn
10.3.6
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
31 : 0
Bit
Destination Address Register (DARn)
Mnemonic
DAddr
DAddr15
DAddr23
DAddr31
DAddr7
Fig. 10.8 Destination Address Register (DARn)
23
31
15
7
Destination address
DAddr14
DAddr22
DAddr30
DAddr6
TMP19A44 (rev1.3) 10-15
Field name
14
22
30
6
DAddr13
DAddr21
DAddr29
DAddr5
13
21
29
5
Destination Address (initial value: −)
Specifies the address of the destination to which data is
transferred using a physical address. This address changes
according to the DAC and TrSiz settings of CCRn and the
DACM setting of DTCRn.
See detailed description.
See detailed description.
See detailed description.
See detailed description.
DAddr12
DAddr20
DAddr28
DAddr4
12
20
28
4
Indeterminate
Indeterminate
Indeterminate
Indeterminate
R/W
R/W
R/W
R/W
DAddr11
DAddr19
DAddr27
DAddr3
11
19
27
3
Description
DAddr10
DAddr18
DAddr26
DAddr2
10
18
26
2
TMP19A44
DAddr17
DAddr25
DAddr1
DAddr9
17
25
1
9
2010-04-01
DAddr16
DAddr24
DAddr0
DAddr8
16
24
0
8