tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 241

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tmp19a44fda

Manufacturer Part Number
tmp19a44fda
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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2 waits automatically inserted
2 waits automatically inserted + 2N (N=1)
External Bus Interface
By setting the bit 3<P33F> of port 3 function register P3FC to "1," the WAIT input pin (P33) can also
serve as the RDY input pin.
The RDY input is input to the external bus interface circuit as the logical reverse of the WAIT input. The
number of waits is specified by the chip selector and wait controller register, BmnCS<BnW>.
Fig. 8.7 shows the RDY inputs and the number of waits.
fsys
A[23:0]
D[15:0]
A[23:0]
D[15:0]
/RDY
/RDY
Fig. 8.7 RDY Input and Wait Operation Timing Diagram
/RD
/RD
--- External RDY sampling point
External RDY sampling points take place before a cycle of waits automatically
inserted is finished and before a 2N_wait cycle is finished as shown above.
The same applies to combinations of other numbers of waits.
TMP19A44 (rev1.3) 8-13
2 waits automatically
2 waits automatically
tsys
inserted
inserted
2N_WAIT
TMP19A44
2010-04-01

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