tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 94

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Exceptions/Interrupts
"0." This optional setting is made by the software program when it is necessary.
This process is automatically performed by hardware.
enable interrupts after relevant registers are saved. If interrupts are enabled before saving registers, a higher
priority level interrupt could corrupt the register data. This optional setting is made by the software program
when it is necessary.
level (ILEV <CMASK>) are to be accepted. If it is desired to disable interrupts during this period, set Status
<IE> of the CP0 register to "0."
interrupts before returning relevant register values. If registers are saved before disabling interrupts, a higher
priority level interrupt could corrupt the register data. This optional setting is made by the software program
when it is necessary.
executed while Status <EXL> of the CP0 register is set to "1," the Status <EXL> will be automatically set to
"0" and interrupt is enabled (provided that Status <IE> of the CP0 register is set to "1").
by the software program when it is necessary.
Status<IE>=1
Interrupts can be enabled by setting Status <IE> of the CP0 register to "1" while Status <EXL> is set to
When an interrupt is generated, Status <EXL> of the CP0 register is set to "1" disabling further interrupts.
If multiple interrupts are to be enabled, it is necessary to set Status <EXL> of the CP0 register to "0" to
This is the period multiple interrupts are enabled. Interrupts with a level higher than the present interrupt
If multiple interrupts are enabled, it is necessary to set Status <EXL> of the CP0 register to "1" to disable
This instruction returns the system to the state before the interrupt generation. If this instruction is
Interrupts can be disabled by setting Status <IE> of the CP0 register to "0." This optional setting is made
Interrupt Generation
Status <EXL> = 0
Multiple Interrupts Enabled
Status <EXL> = 1
ERET Instruction
Status<IE>=0
TMP19A44(rev1.3) 6-44
TMP19A44
2010-04-01