tmp19a44fda TOSHIBA Semiconductor CORPORATION, tmp19a44fda Datasheet - Page 255

• Manufacturer Part Number: tmp19a44fda
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(Note)
The Chip Selector and Wait Controller TMP19A44 (rev1.3) 9-2
BMA0
(0xFF00_1400)
BMA1
(0xFF00_1404)
Make sure that you write "0" for bits 10 through 15 for BMA0 and BMA1.
The size of both the CS0 and CS1 spaces can be a minimum of 16 KB to a maximum of 1
GB. The external address space of the TMP19A44 is 16 MB and so bits 10 through 15 must
be set to "0" as addresses A24 through A29 are not masked.
Base and mask address setting registers BMA0 (0xFFFF_E400) to BMA3 (0xFFFF_E40C)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Fig. 9.1 Base and Mask Address Setting Registers (BMA0, BMA1)
15
23
31
15
23
31
7
1
0
0
0
7
1
0
0
0
14
22
30
14
22
30
A23 to A16 to be set as a start address
A23 to A16 to be set as a start address
6
1
0
0
0
6
1
0
0
0
Make sure that you write "0."
Make sure that you write "0."
CS0 space size setting 0: Address for comparison
CS1 space size setting 0: Address for comparison
13
21
29
13
21
29
A31 to A24 to be set as a start address
A31 to A24 to be set as a start address
5
1
0
0
0
5
1
0
0
0
12
20
28
12
20
28
4
1
0
0
0
4
1
0
0
0
MA0
MA0
MA1
MA1
R/W
R/W
BA0
R/W
BA0
R/W
R/W
R/W
BA1
R/W
BA1
R/W
11
19
27
11
19
27
3
1
0
0
0
3
1
0
0
0
10
18
26
10
18
26
2
1
0
0
0
2
1
0
0
0
TMP19A44
CS0 space size setting
CS1 space size setting
17
25
17
25
0: Address for
0: Address for
1
1
9
1
0
0
1
1
9
1
0
0
comparison
comparison
2010-04-01
16
24
16
24
0
1
8
1
0
0
0
1
8
1
0
0