HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 102

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 2
(5)
The P4 area is defined as a control area which is non-cacheable and non-address translatable. This
area can be accessed only in privileged mode. A part of the LSI’s on-chip I/O is assigned to this
area.
Table 2.1
2.2.2
This LSI uses 29 bits of the 32-bit virtual address to access external memory. In this case, 0.5-
Gbyte of external memory space can be accessed. The external memory space is managed in area
units. Different types of memory can be connected to each area, as shown in figure 2.2. For
details, please refer to section 9, Bus State Controller (BSC).
In addition, area 1 in the external memory space is used as an on-chip I/O space where most of this
LSI’s on-chip I/Os are mapped.
Normally, the upper three bits of the 32-bit virtual address are masked and the lower 29 bits are
used for external memory addresses.*
H'80000100 in the P1 area, address H'A0000100 in the P2 area, and address H'C0000100 in the P3
area of the virtual address space are mapped into address H'00000100 of area 0 in the external
memory space. The P4 area in the virtual address space is not mapped into the external memory
address. If an address in the P4 area is accessed, an external memory cannot be accessed.
Rev. 3.00 Jan. 18, 2008 Page 40 of 1458
REJ09B0033-0300
Address Range Name
H'00000000 to
H'7FFFFFFF
H'80000000 to
H'9FFFFFFF
H'A0000000 to
H'BFFFFFFF
H'C0000000 to
H'DFFFFFFF
H'E0000000 to
H'FFFFFFFF
P4 Area
External Memory Space
CPU
Virtual Address Space
P0/U0
P1
P2
P3
P4
Mode
Privileged/user mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
2
For example, address H'00000100 in the P0 area, address
Description
2-Gbyte physical space, cacheable, address
translatable
In user mode, only this address space can be
accessed.
0.5-Gbyte physical space, cacheable
0.5-Gbyte physical space, non-cacheable
0.5-Gbyte physical space, cacheable,
address translatable
0.5-Gbyte control space, non-cacheable

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