HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 673
![no-image](/images/no-image-200.jpg)
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
(1524 pages)
- Current page: 673 of 1524
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Bit
2
1
0
Bit Name
TFRST
RFRST
LOOP
0
Initial Value R/W
0
0
R/W
R/W
R/W
Section 18
Description
Transmit FIFO Data Register Reset
Cancels the transmit data in the transmit FIFO data
register and resets the data to the empty state.
0: Disables reset operation*
1: Enables reset operation
Note:
Receive FIFO Data Register Reset
Cancels the receive data in the receive FIFO data
register and resets the data to the empty state.
0: Disables reset operation*
1: Enables reset operation
Note:
Loop Back Test
Internally connects the transmit output pin (TxD)
and receive input pin (RxD) and enables the loop
back test.
0: Disables the loop back test
1: Enables the loop back test
*
*
Serial Communication Interface with FIFO (SCIF)
The reset is executed in a power-on
reset or a manual reset.
The reset is executed in a power-on
reset or a manual reset.
Rev. 3.00 Jan. 18, 2008 Page 611 of 1458
REJ09B0033-0300
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