HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 378

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 9
(3)
• CS2WCR
• CS3WCR
Rev. 3.00 Jan. 18, 2008 Page 316 of 1458
REJ09B0033-0300
Bit
31 to 9
8
7
6 to 0
Bit
31 to 15
14
13
12
SDRAM
Bus State Controller (BSC)
Bit Name
A2CL1
A2CL0
Bit Name
TRP1
TRP0
Initial
Value
All 0
1
0
All 0
Initial
Value
All 0
0
0
0
R/W Description
R
R/W
R/W
R
R/W Description
R
R/W
R/W
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Cycles from Auto-Precharge/PRE Command to
ACTV Command
Specify the number of minimum cycles from the start of auto-
precharge or issuing of PRE command to the issuing of
ACTV command for the same bank. The setting for areas 2
and 3 is common.
00: 1 cycle
01: 2 cycles
10: 3 cycles
11: 4 cycles
Reserved
This bit is always read as 0. The write value should always be
0.
Reserved
These bits are always read as 0. The write value should
always be 0.
CAS Latency for Area 2
Specify the CAS latency for area 2.
00: 1 cycle
01: 2 cycles
10: 3 cycles
11: 4 cycles
Reserved
These bits are always read as 0. The write value should
always be 0.

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