HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 613

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

16.2.2
CMCSR is a 16-bit register that indicates the occurrence of compare matches, enables interrupts
and DMA transfer request, and sets the counter input clocks.
Do not change bits other than bits CMF and OVF during the compare match timer counter
(CMCNT) operation.
Bit
15
14
13 to 10 
Compare Match Timer Control/Status Register (CMCSR)
Bit Name
CMF
OVF
Initial
Value
0
0
All 0
R/W
R/(W)*
R/(W)*
R
1
1
Description
Compare Match Flag
This flag indicates whether or not values of the compare
match timer counter (CMCNT) and compare match timer
constant register (CMCOR) have matched.
Software cannot write 1 to the bit. When one-shot is
selected for the counter operation, counting resumes by
clearing this bit.
0: CMCNT and CMCOR values have not matched
[Clearing condition]
•
1: CMCNT and CMCOR values have matched
Overflow Flag
This flag indicates whether or not the compare match
timer counter (CMCNT) has overflowed and been cleared
to 0. Software cannot write 1 to this bit.
0: CMCNT has not overflowed
[Clearing condition]
•
1: CMCNT has overflowed
Reserved
These bits are always read as 0. The write value should
always be 0.
Write 0 to CMF after reading CMF=1
Write 0 to OVF after reading OVF=1
Rev. 3.00 Jan. 18, 2008 Page 551 of 1458
Section 16 Compare Match Timer (CMT)
REJ09B0033-0300