HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 375

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
• CS4WCR
Bit
6
5 to 0
Bit
31 to 21 
20
19, 18
Bit Name
BEN
Bit Name
WM
Initial
Value
All 0
0
All 0
Initial
Value
0
All 0
R/W Description
R
R/W Burst Enable Specification
R
R/W
R/W
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Enables or disables 8-burst access for a 16-bit bus width or
16- burst access for an 8-bit bus width during 16-byte access.
If this bit is set to 1, 2-burst access is performed four times
when the bus width is 16 bits and 4-burst access is
performed four times when the bus width is 8 bits.
To use a device that does not support 8-burst access or 16-
burst access, set this bit to 1.
0: Enables 8-burst access for a 16-bit bus width and 16-burst
1: Disables 8-burst access for a 16-bit bus width and 16-burst
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
External Wait Mask Specification
Specify whether or not the external wait input is valid. The
specification by this bit is valid even when the number of
access wait cycles is 0.
0: External wait is valid
1: External wait is ignored
Reserved
These bits are always read as 0. The write value should
always be 0.
access for an 8-bit bus width.
access for an 8-bit bus width.
Rev. 3.00 Jan. 18, 2008 Page 313 of 1458
Section 9
Bus State Controller (BSC)
REJ09B0033-0300

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