HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 414
HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
(1524 pages)
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Section 9
Table 9.13 Relationship between A2/3BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and
Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the
Rev. 3.00 Jan. 18, 2008 Page 352 of 1458
REJ09B0033-0300
A2/3
BSZ
[1:0]
11 (32 bits)
Output Pin of
This LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
2. Bank address specification
Bus State Controller (BSC)
access mode.
512-Mbit product (4 Mwords x 32 bits x 4 banks, column 10 bits product): 1
256-Mbit product (4 Mwords x 16 bits x 4 banks, column 10 bits product): 2
Address Multiplex Output (2)-2
A2/3
ROW
[1:0]
01 (12 bits)
Row Address
Output
A27
A26
A25*
A24*
A23
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A22
2
2
Example of connected memory
Setting
A2/3
COL
[1:0]
10 (10 bits)
Column Address
Output
A17
A16
A25*
A24*
A13
L/H*
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
2
Synchronous
DRAM Pin
A13 (BA1)
A12 (BA0)
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Function
Unused
Specifies bank
Address
Specifies
address/precharge
Address
Unused
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