HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1501

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Item
Table 35.6 Port F Data Register
(PFDR) Read/Write Operations
35.16 Port T
Figure 35.16 Port T
Section 36 User Debugging
Interface (H-UDI)
36.3 Register Descriptions
36.3.3 Shift Register
36.3.4 Boundary Scan Register
(SDBSR)
Page Revision (See Manual for Details)
1191
1211 Changed
1220 Added
1221 Added
1221 Changed
Changed
Shift register is a 32-bit register. The upper 16-bits are
set in SDIR at Update-IR.
If shifted in, the shift-in value is shift out after the value
of the 32-bit shift register is shifted out.
SDBSR is a 434-bit shift register, located on the PAD,
for controlling the …
PFCR State
PFnMD1
0
Port T
ID register (SDID)
Shift register
PFnMD0
1
PTT4 (input/output) / SCIF0_CTS (input) / TPUTO1 (output)
PTT3 (input/output) / SCIF0_RTS (output) / TPUTO0 (output)
PTT2 (input/output) / SCIF0_TxD (output) / IrTX (output)
PTT1 (input/output) / SCIF0_RxD (input) / IrRX (input)
PTT0 (input/output) / SCIF0_SCK (input/output)
Rev. 3.00 Jan. 18, 2008 Page 1439 of 1458
Pin State
Reserved
Read
REJ09B0033-0300
Write

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