HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 376

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9
Rev. 3.00 Jan. 18, 2008 Page 314 of 1458
REJ09B0033-0300
Bit
17
16
15 to 13 
12
11
Bit Name
BW1
BW0
SW1
SW0
Bus State Controller (BSC)
Initial
Value
0
0
All 0
0
0
R/W Description
R/W
R/W
R
R/W
R/W
Number of Burst Wait Cycles
Specify the number of wait cycles to be inserted between the
second or later access cycles in burst access.
00: 0 cycles
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Delay Cycles from Address, CSn Assertion to RD,
WEn (BEn) Assertion
Specify the number of delay cycles from address and CSn
assertion to RD and WEn (BEn) assertion. These bits can be
specified only in area 4.
00: 0.5 cycle
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles