HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1381

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

38.4.2
Table 38.8 Control Signal Timing
Conditions: V
Notes: 1. RESETP, NMI, and IRQ5 to IRQ0 are asynchronous. Changes are detected at the
Item
RESETP pulse width
RESETP setup time*
RESETP hold time
RESETM pulse width
RESETM setup time*
RESETM hold time
BREQ setup time
BREQ hold time
NMI setup time*
NMI hold time
IRQ5 to IRQ0 setup time*
IRQ5 to IRQ0 hold time
BACK delay time
STATUS0 delay time
Bus tri-state delay time 1
Bus tri-state delay time 2
Bus buffer-on time 1
Bus buffer-on time 2
2. The upper limits of the external bus clock are 66.67 MHz (133 MHz version).
3. In standby mode, t
4. t
Control Signal Timing
clock rise when the setup time shown is used. If the setup time cannot be used,
detection may be delayed until the next clock rises.
t
RESPW
cyc
V
means the external bus clock cycle (B clock cycle).
CC
CC
1
Q = 2.7 to 3.6 V, V
= t
= 1.4 to 1.6 V, Ta = –20 to 75°C
PLL
1
1
(100 µs).
1
RESPW
= t
CC
SOC2
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Q1 = 2.7 to 3.6 V or 1.65 to 1.95 V,
RESPW
RESPS
RESPH
RESPW
RESPS
RESPH
BREQS
BREQH
NMIS
NMIH
IRQS
IRQH
BACKD
STD
BOFF1
BOFF2
BON1
BON2
(10 ms). When the clock multiplication ratio is changed,
Min.
20*
23
2
20*
23
2
1/2t
1/2t
8
3
8
3
1/2t

0
0
0
0
3
3
cyc
cyc
cyc
+ 7
+ 2
Rev. 3.00 Jan. 18, 2008 Page 1319 of 1458
Max.












1/2t
18
30
30
30
30
Section 38
cyc
+ 13 ns
Electrical Characteristics
Unit
tcyc*
ns
ns
tcyc*
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
REJ09B0033-0300
2
2
*
*
4
4
Figure
38.8, 38.9
38.10
38.9
38.10, 38.11
38.10, 38.11