HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 908

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 25
25.4.5
EP2 has two 64-byte FIFOs, but the user can perform data transmission and transmit data writes
without being aware of this dual-FIFO configuration. However, one data write is performed for
one FIFO. For example, even if both FIFOs are empty, it is not possible to perform EP2/PKTE at
one time after consecutively writing 128 bytes of data. EP2/PKTE must be performed for each 64-
byte write.
When performing bulk-in transfer, as there is no valid data in the FIFOs on reception of the first
IN token, an IFR0/EP2 TR interrupt is requested. With this interrupt, 1 is written to the IER0/EP2
EMPTY bit, and the EP2 FIFO empty interrupt is enabled. At first, both EP2 FIFOs are empty,
and so an EP2 FIFO empty interrupt is generated immediately.
Rev. 3.00 Jan. 18, 2008 Page 846 of 1458
REJ09B0033-0300
EP2 Bulk-In Transfer (Dual FIFOs)
USB Function Controller (USBF)
Data transmission to host
Clear EP2 empty status
(IFR0/EP2 EMPTY = 0)
IN token reception
in EP2 FIFO?
in EP2 FIFO?
Valid data
Space
Figure 25.12
Yes
No
ACK
USB function
No
Yes
NAK
EP2 Bulk-In Transfer Operation
empty status
EMPTY = 1)
(IFR0/EP2
Set EP2
Interrupt request
Interrupt
request
Write one packet of data
(IER0/EP2 EMPTY = 1)
Write 1 to EP2 packet
(TRG/EP2 PKTE = 1)
to EP2 data register
(IFR0/EP2 TR = 0)
Application
Clear EP2 transfer
IFR0/EP2 EMPTY
Enable EP2 FIFO
empty interrupt
request flag
enable bit
(EPDR2)
interrupt

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