HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 950

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 26
Rev. 3.00 Jan. 18, 2008 Page 888 of 1458
REJ09B0033-0300
Bit
8
7 to 0
Bit Name
VEINTS

LCD Controller (LCDC)
Initial Value
0
All 0
R/W
R/W
R
Description
Vsync End Interrupt State
Indicates the LCDC's Vsync end interrupt handling
state. This bit is set to 1 at the time a Vsync end
interrupt is generated. During the Vsync end
interrupt handling routine, this bit should be cleared
by writing 0.
0: LCDC did not generate a Vsync end interrupt or
1: LCDC has generated a Vsync end interrupt and
Reserved
These bits are always read as 0. The write value
should always be 0.
has been informed that the generated Vsync end
interrupt has completed
has not yet been informed that the generated
Vsync interrupt has completed