HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 550

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13
13.4
13.4.1
Executing the SLEEP instruction when the STBY bit in STBCR is 0 causes a transition from the
program execution state to sleep mode. Although the CPU halts immediately after executing the
SLEEP instruction, the contents of the CPU registers remain unchanged. The on-chip peripheral
modules continue to operate in sleep mode and the clock continues to be output to the CKIO pin.
In sleep mode the output of the STATUS0 pin and STATUS1 pin go high and low, respectively.
13.4.2
Sleep mode is canceled by an interrupt (NMI, IRQ, IRL, PINT, and on-chip peripheral module) or
reset. Interrupts are accepted in sleep mode even when the BL bit in SR is 1. If necessary, save
SPC and SSR to the stack before executing the SLEEP instruction.
(1)
When an NMI, IRQ, IRL, PINT, or on-chip peripheral module interrupt occurs, sleep mode is
canceled and interrupt exception handling is executed. A code indicating the interrupt source is set
in INTEVT and INTEVT2.
(2)
Sleep mode is canceled by a power-on reset or a manual reset.
Rev. 3.00
REJ09B0033-0300
Canceling with Interrupt
Canceling with Reset
Sleep Mode
Transition to Sleep Mode
Canceling Sleep Mode
Jan. 18, 2008
Power-Down Modes
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