HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 156

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 3 DSP Operating Unit
The RS and RE registers must be specified appropriately according to the rules shown in table 3.4.
The SH assembler supports control macros (REPEAT) as shown in table 3.6 to solve problems.
Table 3.6
Using the repeat macros shown in table 3.4, examples 1 to 4 shown above can be simplified to
examples 5 to 8 as shown below.
• Example 5: Repeat loop consisting of 4 or more instructions (extended to the instruction
Rev. 3.00 Jan. 18, 2008 Page 94 of 1458
REJ09B0033-0300
Instruction
REPEAT RptStart,
RptEnd, #imm
REPEAT RptStart,
RptEnd, Rm
RptStart: instr1
Rptend:
stream shown in example 1, above)
Repeat Control Macros
REPEAT RptStart, RptEnd, #4
Instr0
... ...
... ...
instr(N-3)
instr(N-2)
instr(N-1)
instrN
Operation
Specifies RptStart as repeat start instruction, RptEnd as
repeat end instruction, and 8-bit immediate data #imm
as number of repetitions. This macro is extended to
three instructions: LDRS, LDRE, and SETRC which are
converted correctly.
Specifies RptStart as repeat start instruction, RptEnd as
repeat end instruction, and the [11:0] bits of Rm as
number of repetitions. This macro is extended to three
instructions: LDRS, LDRE, and SETRC which are
converted correctly.
;
;
;
;
; [Repeat start instruction]
;
;
; [Repeat end instruction]
Number of
Execution States
3
3