HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 169

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
(1)
The double data transfer instructions supports the following three addressing modes.
• Non-update address register addressing
• Increment address register addressing
• Addition index register addressing
When using X/Y data addressing, bit 0 of the address pointer is invalid; bits 0 and 1 of the address
pointer are invalid in word access. Accordingly, bit 0 of the address pointer and index register
must be cleared to 0 in X/Y data addressing.
When accessing X and Y memory using the X and Y buses, the upper word of Ax and Ay is
ignored. The result of Ay+ or Ay+Iy is stored in the lower word of Ay, while the upper word
retains its original value. The Ax and Ax +Ix operations are executed in longword (32 bits) and the
upper word may be changed according to the result.
(2)
The following four kinds of addressing can be used with single data transfer instructions.
• Non-update address register addressing
• Increment address register addressing:
• Addition index register addressing:
• Decrement address register addressing:
The Ax and Ay registers are address pointers. They are not updated.
The Ax and Ay registers are address pointers. After a data transfer, they are each incremented
by 2 (post-increment).
The Ax and Ay registers are address pointers. After a data transfer, the value of the Ix or Iy
register is added to each (post-increment). The double data transfer instructions do not
supports decrement addressing mode. To perform decrement, –2 or –4 is set in the index
register and addition index register addressing is specified.
The As register is an address pointer. An access to @As is performed but As is not updated.
The As register is an address pointer. After an access to @As, the As register is incremented
by 2 or 4 (post-increment).
The As register is an address pointer. After an access to @As, the value of the Is register is
added to the As register (post-increment).
The As register is an address pointer. Before a data transfer, –2 or –4 is added to the As
register (i.e. 2 or 4 is subtracted) (pre-decrement).
Addressing Mode for Double Data Transfer Instructions
Single Data Addressing
Rev. 3.00 Jan. 18, 2008 Page 107 of 1458
Section 3 DSP Operating Unit
REJ09B0033-0300

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