HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 310

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 8
Table 8.2
Note:
As shown in table 8.2, on-chip peripheral module or IRQ interrupts are assigned to four 4-bit
groups in each register. These 4-bit groups (bits 15 to 12, bits 11 to 8, bits 7 to 4, and bits 3 to 0)
are set with values from H'0 (0000) to H'F (1111). Setting H'0 means priority level 0 (masking is
requested); H'F means priority level 15 (the highest level).
Rev. 3.00 Jan. 18, 2008 Page 248 of 1458
REJ09B0033-0300
Register
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRI
IPRJ
*
Interrupt Controller (INTC)
Reserved. Always read as 0. The write value should always be 0. The SSL and SDHI-
related bits are effective only for the models that include them. Reserved bits apply if
they are not included.
Interrupt Sources and IPRA to IPRJ
Bits 15 to 12
TMU0
WDT
IRQ3
Reserved*
DMAC (1)
ADC
SCIF0
PINTA
SIOF0
Reserved*
Bits 11 to 8
TMU1
REF
IRQ2
TMU (TMU_SUNI) IRQ5
Reserved*
DMAC (2)
SCIF1
PINTB
SIOF1
USBH
Bits 7 to 4
TMU2
SIM
IRQ1
LCDC
USBF
Reserved*
TPU
MMC
SDHI
RTC
Reserved*
IRQ0
IRQ4
SSL
Reserved*
I
PCC
Bits 3 to 0
CMT
AFEIF
2
C

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