HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1052

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 30
30.3.1
SCSMR is an 8-bit readable/writable register that selects settings for the communication format of
the smart card interface.
Rev. 3.00 Jan. 18, 2008 Page 990 of 1458
REJ09B0033-0300
Bit
7, 6
5
4
3 to 0
Bit Name
O/E
Serial Mode Register (SCSMR)
SIM Card Module (SIM)
Initial
Value
All 0
1
0
All 0
R/W
R
R
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Parity Mode
Selects whether even or odd parity is to be used when
adding a parity bit and checking parity.
0: Even parity*
1: Odd parity*
Notes: 1. When set to even parity, during transmission a
Reserved
These bits are always read as 0. The write value should
always be 0.
2. When set to odd parity, during transmission a
parity bit is added such that the sum of 1 bits in
the parity bit and transmit characters is even.
During reception, a check is performed to
ensure that the sum of 1 bits in the parity bit
and the receive characters is even.
parity bit is added such that the sum of 1 bits in
the parity bit and transmit characters is odd.
During reception, a check is performed to
ensure that the sum of 1 bits in the parity bit
and the receive characters is odd.
2
1

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