HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1492

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Rev. 3.00 Jan. 18, 2008 Page 1430 of 1458
REJ09B0033-0300
Item
(4) Operation of Commands
without Data Transfer
Figure 31.6 Operational Flowchart
for Commands without Data
Transfer
(5) Commands with Read Data
Page Revision (See Manual for Details)
1065 Changed
1066 Changed
1067 Added
• The end of the command sequence is detected by
Note: In multiblock transfer, if you terminate the
polling the BUSY flag in CSTR or by the data transfer
end flag (DTI) or the multiblock transfer (pre-defined)
end flag (BTI).
command sequence (by writing 1 in the CMDOFF
bit) before the command response reception is
completed (CRPI = 1), the command response
cannot be received correctly. To receive a
command response, continue the command
sequence (by setting the RD_CONTI bit to 1) until
the reception of the command response is
completed.
Note*:
No
Command sequence end
Write 1 to CMDSTRT
For the R2 command response, no CRC check is performed by hardware.
Therefore, perform CRC checking by software to see if there is an error.
DTBUSY detected?
CRCERI interrupt
R1b response?
DBSYI interrupt
Yes
Yes
Yes
Yes
CRPI interrupt
No
generated?*
generated?
generated?
Yes
No
No
No
Write 1 to CMDOFF
CTERI interrupt
Yes
generated?
No