HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 1466

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Rev. 3.00 Jan. 18, 2008 Page 1404 of 1458
REJ09B0033-0300
Item
Section 9 Bus State Controller
(BSC)
9.2 Input/Output Pins
Table 9.1 Pin Configuration
9.3.2 Shadow Area
9.4.1 Common Control Register
(CMNCR)
Page Revision (See Manual for Details)
283,
284
285
291
Amended
Changed
The BSC decodes A28 to A25 of the physical address
and generates chip select signals that correspond to
areas 0, 2 to 4, 5A, 5B, 6A, and 6B.
Amended
Name
RD/WR
RD
WAIT
REFOUT O
Bit
31 to
16
15
Bit
Name
O
O
I
Initial
Value R/W
All 0
0
I/O
Function
Read/write signal
Connects to WE pins when
SDRAM or byte-selection SRAM is
connected.
Read strobe (read data output
enable signal)
A strobe signal to indicate the
memory read cycle when the
PCMCIA is used.
External wait input (sampled at the
falling edge of CKIO)
Bus mastership request signal for
refreshing
R
R
Description
Reserved
These bits are always read as 0. The
Reserved
This bit is always read as 0. The
write value should always
be 0.
write value should always be 0.

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