HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 990

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 26
26.6
26.6.1
Follow the procedure below to halt access to VRAM for storing display data (synchronous DRAM
in area 3).
• Procedure for Halting Access to Display Data Storage VRAM
This halting procedure is required before selecting self-refreshing for the display data storage
VRAM (synchronous DRAM in area 3) or making a transition to standby mode or module standby
mode.
Rev. 3.00 Jan. 18, 2008 Page 928 of 1458
REJ09B0033-0300
A. Confirm that the LPS1 and LPS0 bits in LDPMMR are currently set to 1.
B. Clear the DON bit in LDCNTR to 0 (display-off mode).
C. Confirm that the LPS1 and LPS0 bits in LDPMMR have changed to 0.
D. Wait for the display time for a single frame to elapse.
Usage Notes
Procedure for Halting Access to Display Data Storage VRAM (Synchronous
DRAM in Area 3)
LCD Controller (LCDC)

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