HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 387

• Manufacturer Part Number: HD6417320
• Description: Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.4.4
SDCR specifies the method to refresh and access SDRAM, and the types of SDRAMs to be
connected.
Bit
31 to 21 
20
19
18
17
16
15, 14
13
SDRAM Control Register (SDCR)
Bit Name
A2ROW1
A2ROW0

A2COL1
A2COL0

DEEP
Initial
Value
All 0
0
0
0
0
0
All 0
0
R/W
R
R/W
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Bits of Row Address for Area 2
Specify the number of bits of row address for area 2.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
Reserved
This bit is always read as 0. The write value should always
be 0.
Number of Bits of Column Address for Area 2
Specify the number of bits of column address for area 2.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)
Reserved
These bits are always read as 0. The write value should
always be 0.
Deep Power-Down Mode
This bit is valid for low-power SDRAM. If the RMODE bit is
set to 1 while this bit is set to 1, the deep power-down entry
command is issued and the low-power SDRAM enters the
deep power-down mode.
0: Self-refresh mode
1: Deep power-down mode
Rev. 3.00 Jan. 18, 2008 Page 325 of 1458
Section 9
Bus State Controller (BSC)
REJ09B0033-0300