HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 872

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 25
25.3.2
IFR1 is an interrupt flag register for VBUS and EP3. When each flag is set to 1 and the interrupt is
enabled in the corresponding bit of IER1, an interrupt request is generated as specified by the
corresponding bit in ISR1. Clearing is performed by writing 0 to the bit to be cleared. Writing 1 is
not valid and nothing is changed.
Rev. 3.00 Jan. 18, 2008 Page 810 of 1458
REJ09B0033-0300
Bit
0
Bit
7 to 4 
3
2
Bit Name
EP0i TS
Bit Name
VBUS MN
EP3 TR
Interrupt Flag Register 1 (IFR1)
USB Function Controller (USBF)
Initial Value
0
Initial Value
All 0
0
0
R/W Description
R/W EP0i Transmit Complete
R/W Description
R
R
R/W EP3 (Interrupt) Transfer Request
[Setting condition]
When data to be transmitted to the host is written to
EP0i, then data is normally transferred from the
function to the host, and an ACK handshake is
returned.
[Clearing conditions]
Reserved
These bits are always read as 0. The write value
should always be 0.
USB Connection Status
Status bit to monitor the USBF_VBUS pin state.
Reflects the state of the USBF_VBUS pin.
0: Disconnected
1: Connected
[Setting condition]
When an IN token is issued from the host to EP3 and
the FIFO buffer is empty.
[Clearing conditions]
When reset
When 0 is written to by CPU
When reset
When 0 is written to by CPU

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