HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 59

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HD6417320

Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 26.5
Table 26.6
Table 26.7
Section 27 A/D Converter
Table 27.1
Table 27.2
Table 27.3
Table 27.4
Table 27.5
Section 28 D/A Converter (DAC)
Table 28.1
Section 29 PC Card Controller (PCC)
Table 29.1
Table 29.2
Table 29.3
Section 30 SIM Card Module (SIM)
Table 30.1
Table 30.2
Table 30.3
Table 30.4
Section 31 MultiMediaCard Interface (MMCIF)
Table 31.1
Table 31.2
Table 31.3
Table 31.4
Table 31.5
Section 33 User Break Controller (UBC)
Table 33.1
Table 33.2
Table 33.3
Available Power-Supply Control-Sequence Periods at Typical Frame Rates....... 913
LCDC Operating Modes ....................................................................................... 914
LCD Module Power-Supply States....................................................................... 914
Pin Configuration.................................................................................................. 931
Analog Input Channels and A/D Data Registers................................................... 932
A/D Conversion Time (Single Mode)................................................................... 943
Conditions for the Method of Transferring Results of A/D Conversion
and Inclusion of Superfluous DMA ...................................................................... 947
Analog Input Pin Ratings...................................................................................... 950
Pin Configuration.................................................................................................. 954
Features of the PCMCIA Interface ....................................................................... 959
PCC Pin Configuration ......................................................................................... 962
PCMCIA Support Interface .................................................................................. 977
Pin Configuration.................................................................................................. 989
Register Settings for Smart Card Interface ......................................................... 1009
Example of Bit Rates (bits/s) for SCBRR Settings
(Pφ = 19.8 MHz, SCSMPL = 371)...................................................................... 1011
Interrupt Sources of Smart Card Interface .......................................................... 1018
Pin Configuration................................................................................................ 1029
Correspondence between Commands and Settings of CMDTYR
and RSPTYR ...................................................................................................... 1034
CMDR Configuration ......................................................................................... 1037
Correspondence between Command Response Byte Number and RSPR........... 1039
MMCIF Interrupt Sources................................................................................... 1108
Specifying Break Address Register .................................................................... 1116
Specifying Break Data Register.......................................................................... 1118
Data Access Cycle Addresses and Operand Size Comparison Conditions ......... 1129
Rev. 3.00 Jan. 18, 2008 Page lix of lxii

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