HD6417320 RENESAS [Renesas Technology Corp], HD6417320 Datasheet - Page 590
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HD6417320
Manufacturer Part Number
HD6417320
Description
Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417320.pdf
(1524 pages)
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Section 15
15.4
15.4.1
Operation in each mode is outlined below.
(1)
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, synchronous counting, and external event counting.
(2)
When a compare match occurs, the value in the buffer register for the relevant channel is
transferred to TGR. For update timing from a buffer register, rewriting on compare match
occurrence or on counter clearing can be selected.
(3)
In this mode, a PWM waveform is output. The output level can be set by means of TIOR. A PWM
waveform with a duty of between 0% and 100% can be output, according to the setting of each
TGR register.
(4)
In this mode, TCNT is incremented or decremented by detecting the phases of two clocks input
from the external clock input pins (TPU_TI2A and TPU_TI2B, or TPU_TI3A and TPU_TI3B) in
channels 2, and 3. When phase counting mode is set, the corresponding TI pin functions as the
clock pin, and TCNT performs up/down-counting.
This can be used for two-phase encoder pulse input.
Rev. 3.00 Jan. 18, 2008 Page 528 of 1458
REJ09B0033-0300
Normal Operation
Buffer Operation
PWM Mode
Phase Counting Mode
Operation
Overview
16-Bit Timer Pulse Unit (TPU)
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