MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 125
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
MMC2114CFCAG33
Manufacturer:
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4.7 Memory Map and Registers
4.7.1 Programming Model
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
This subsection provides a description of the memory map and registers.
The CCM programming model consists of these registers:
Some control register bits are implemented as write-once bits. These
bits are always readable, but once the bit has been written, additional
writes have no effect, except during debug and test operations.
Some write-once bits and test bits can be read and written while in debug
mode or test mode. When debug or test mode is exited, the chip
configuration module resumes operation based on the current register
values. If a write to a write-once register bit occurs while in debug or test
mode, the register bit remains writable on exit from debug or test mode.
Table 4-2
All configurations
Debug operation (all modes)
Test operation (all modes)
Master mode
Single-chip mode
FAST mode
Emulation mode
•
•
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
The Chip Configuration Register (CCR) controls the main chip
configuration. See
The Reset Configuration Register (RCON) indicates the default
chip configuration. See
The Chip Identification Register (CIR) contains a unique part
number. See
The Chip Test Register (CTR) contains chip-specific test
functions. See
Table 4-2. Write-Once Bits Read/Write Accessibility
Chip Configuration Module (CCM)
shows the accessibility of write-once bits.
Go to: www.freescale.com
Configuration
4.7.3.3 Chip Identification
4.7.3.4 Chip Test
4.7.3.1 Chip Configuration
4.7.3.2 Reset Configuration
Register.
Read-always
Write-always
Write-always
Write-once
Write-once
Write-once
Write-once
Chip Configuration Module (CCM)
Register.
Read/Write Access
Memory Map and Registers
Register.
Advance Information
Register.
125
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