MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 501

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.10.7.2 Externally Triggered Continuous-Scan Mode
19.10.7.3 Externally Gated Continuous-Scan Mode
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
latest conversion results can be read from the result table at any time.
Once initiated, software action is not needed to sustain conversions of
channel.
The QADC provides external trigger pins for both queues. When
externally triggered continuous-scan mode is selected, a transition on
the associated external trigger pin initiates queue execution. The polarity
of the external trigger signal is programmable, so that a mode which
begins queue execution on the rising or falling edge can be selected.
Each CCW is read and the indicated conversions are performed until an
end-of-queue condition is encountered. When the next external trigger
edge is detected, queue execution begins again automatically. Software
involvement is not needed between trigger events.
When a pause bit is encountered in externally triggered continuous-scan
mode, another trigger event is required for queue execution to continue.
Software involvement is not needed for queue execution to continue
from the paused state.
Some applications need to synchronize the sampling of analog channels
to external events. There are cases when it is not possible to use
software initiation of the queue scan sequence, because interrupt
response times vary. Externally triggered continuous-scan mode is
useful in these cases.
The QADC provides external gating for queue 1 only. When externally
gated continuous-scan mode is selected, the input level on the
associated external trigger pin enables and disables queue execution.
The polarity of the external gate signal is fixed so that a high level opens
the gate and a low level closes the gate. Once the gate is open, each
CCW is read and the indicated conversions are performed until the gate
is closed. When the gate opens again, queue execution automatically
restarts at the beginning of the queue. Software involvement is not
needed between trigger events. If a pause in a CCW is encountered, the
pause flag does not set, and execution continues without pausing.
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Go to: www.freescale.com
Queued Analog-to-Digital Converter (QADC)
Advance Information
Digital Control
501