MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 265
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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11.8.4.2 Loss-of-Clock Reset
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
NRM
NRM
REF
SCM
SCM
SCM
SCM
MODE
PLL = PLL enabled during STOP mode. PLL = On when STPMD[1:0] = 00 or 01
OSC = OSC enabled during STOP mode. OSC = On when STPMD[1:0] = 00, 01, or 10
MODES
LOCKS
LOCS
In
NRM
EXT
REF
SCM
RESET = immediate reset
‘LK
0–>‘LK = current value is 0 until lock is regained which then will be the previous value before entering stop
0–>
‘LC
1–>‘LC = current value is 1 until clock is regained which then will be the previous value before entering stop
1–>
1 1 0 On On 1
1 1 1 On On X
1 0 0
1 0 0 Off
1 0 0 Off
1 0 0 On On 0
1 0 0 On On 1
= normal PLL crystal clock reference or normal PLL external reference or PLL 1:1 mode. During PLL 1:1 or normal external reference
= external clock mode
= PLL reference mode due to losing PLL clock or lock from NRM mode
= PLL self-clocked mode due to losing reference clock from NRM mode
= expecting previous value of LOCKS before entering stop
= current value is 0 until lock is regained but lock is never expected to regain
= expecting previous value of LOCS before entering stop
= current value is 1 until clock is regained but CLK is never expected to regain
mode, the oscillator is never enabled. Therefore, during these modes, refer to the OSC = On case regardless of STPMD values.
X
X
X
X
X
0 PLL disabled
1 PLL disabled
Action at Stop
Expected PLL
Table 11-8. Stop Mode Operation (Sheet 3 of 3)
When a loss-of-clock condition is recognized, reset is asserted if the
LOCRE bit in SYNCR is set. The LOCS bit in SYNSR is cleared after
reset. Therefore, the LOC bit must be read in RSR to determine that a
loss of clock condition occurred. LOCRE has no effect in external clock
mode.
—
—
—
—
—
Freescale Semiconductor, Inc.
For More Information On This Product,
Lose clock
Lose lock
Lose lock, regain
Lose clock or lock
Lose reference clock
Regain SCM
Regain SCM
Lose reference clock
Lose reference clock
During Stop
PLL Action
Go to: www.freescale.com
—
—
—
—
—
Clock Module
NRM
RESET
Unstable NRM
NRM
NRM
RESET
REF
Stuck
SCM
SCM
SCM
SCM
SCM
SCM
MODE
Out
‘LK
‘LK
—
—
—
0
0
0
0
0
0
0
0–>1
—
—
—
X
1
1
1
0
0
0
0
‘LC
‘LC
‘LC
‘LC
—
—
—
1
1
1
1
1
Reset immediately
Reset immediately
Wakeup without lock
Wakeup without lock
Functional Description
Advance Information
Comments
Clock Module
265
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