MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 331

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.7.8 Timer Control Register 1
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: TIM1 — 0x00ce_0009
Reset:
Read: Anytime
Write: Anytime
OMx/OLx — Output Mode/Output Level Bits
Read:
Write:
These bit pairs select the output action to be taken as a result of a
successful output compare. When either OMx or OLx is set and the
IOSx bit is set, the pin is an output regardless of the state of the
corresponding DDR bit.
Channel 3 shares a pin with the pulse accumulator input pin. To use
the PAI input, clear both the OM3 and OL3 bits and clear the OC3M3
bit in the Output Compare 3 Mask Register.
Freescale Semiconductor, Inc.
For More Information On This Product,
TIM2 — 0x00cf_0009
OM3
Bit 7
Figure 16-11. Timer Control Register 1 (TIMCTL1)
OMx:OLx
0
Timer Modules (TIM1 and TIM2)
00
01
10
11
Table 16-3. Output Compare Action Selection
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OL3
6
0
Timer disconnected from output pin logic
Toggle OCx output line
Clear OCx output line
Set OCx line
OM2
5
0
Action on Output Compare
OL2
4
0
OM1
3
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
OL1
2
0
Advance Information
OM0
1
0
Bit 0
OL0
0
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