MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 411
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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18.7.7 SPI Port Data Register
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
SPIPURD
Register
Pullup Enable Control
PUPSP
Pin function:
Bit
Address: 0x00cb_0007
Reset:
Read:
Write:
Read: Anytime
Write: Anytime
RSVD[7:4] — Reserved
PORTSP[3:0] — SPI Port Data Bits
Writing to these read/write bits updates their values but has no effect
on functionality.
Data written to SPIPORT drives pins only when they are configured
as general-purpose outputs.
Reading an input (DDRSP bit clear) returns the pin level; reading an
output (DDRSP bit set) returns the pin driver input level.
Writing to any of the PORTSP[3:0] pins does not change the pin state
when the pin is configured for SPI output.
SPIPORT I/O function depends upon the state of the SPE bit in
SPICR1 and the state the DDRSP bits in SPIDDR.
Freescale Semiconductor, Inc.
Reset
State
For More Information On This Product,
RSVD7
0
Bit 7
0
Serial Peripheral Interface Module (SPI)
Figure 18-8. SPI Port Data Register (SPIPORT)
Table 18-6. SPI Port Summary
SPIPURD
Register
Go to: www.freescale.com
RSVD6
6
0
Reduced Drive Control
RDPSP[1:0]
RSVD5
5
0
Bit
RSVD4
4
0
Full drive
Reset
State
Serial Peripheral Interface Module (SPI)
PORTSP3 PORTSP2 PORTSP1 PORTSP0
SS
3
0
Register
SPICR1
Memory Map and Registers
SCK
Mode Control
2
0
Wired-OR
SWOM
Advance Information
Bit
MOSI/
MOMI
0
1
Normal
Reset
State
MISO/
SISO
Bit 0
0
411
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