MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 31

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Advance Information — MMC2114, MMC2113, and MMC2112
Figure
1-1
2-1
2-2
2-3
2-4
3-1
3-2
3-3
4-1
4-2
4-3
4-4
4-5
5-1
5-2
5-3
5-4
7-1
7-2
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8-1
8-2
Freescale Semiconductor, Inc.
For More Information On This Product,
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
MMC2112 Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
MMC2113 Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
MMC2114 Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
196-Ball MAPBGA Assignments. . . . . . . . . . . . . . . . . . . . . . .103
144-Pin LQFP Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . 104
100-Pin LQFP Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Chip Configuration Module Block Diagram. . . . . . . . . . . . . . . 124
Chip Configuration Register (CCR) . . . . . . . . . . . . . . . . . . . . 126
Reset Configuration Register (RCON) . . . . . . . . . . . . . . . . . .129
Chip Identification Register (CIR) . . . . . . . . . . . . . . . . . . . . . . 131
Chip Test Register (CTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Reset Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . .141
Reset Control Register (RCR) . . . . . . . . . . . . . . . . . . . . . . . . 143
Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . . . . . 145
Reset Control Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
M•CORE Processor Block Diagram . . . . . . . . . . . . . . . . . . . . 167
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Data Organization in Memory . . . . . . . . . . . . . . . . . . . . . . . . . 171
Data Organization in Registers. . . . . . . . . . . . . . . . . . . . . . . . 171
Interrupt Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . 179
Interrupt Control Register (ICR) . . . . . . . . . . . . . . . . . . . . . . .181
Go to: www.freescale.com
List of Figures
Title
List of Figures
Advance Information
Page
31

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