MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 583

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.14.1 Operation
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
An instruction is scanned into the OnCE module through the serial
interface and then decoded. Data may then be scanned in and used to
update a register or resource on a write to the resource, or data
associated with a resource may be scanned out for a read of the
resource.
For accesses to the CPU internal state, the OnCE controller requests the
CPU to enter debug mode via the CPU DBGRQ input. Once the CPU
enters debug mode, as indicated by the OnCE Status Register (OSR),
the processor state may be accessed through the CPU Scan Register.
Freescale Semiconductor, Inc.
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For More Information On This Product,
TEST-LOGIC-RESET
RUN-TEST/IDLE
JTAG Test Access Port and OnCE
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Go to: www.freescale.com
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Figure 22-6. OnCE Controller
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CAPTURE — DR
UPDATE — DR
PAUSE — DR
SELECT DR-
SHIFT — DR
EXIT1 — DR
EXIT2 — DR
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SCAN
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1
1
0
0
0
0
0
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JTAG Test Access Port and OnCE
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Functional Description
CAPTURE — IR
UPDATE — IR
Advance Information
SELECT — IR
PAUSE — IR
SHIFT — IR
EXIT1 — IR
EXIT2 — IR
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SCAN
0
1
0
1
1
0
0
0
0
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