MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 352
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Timer Modules (TIM1 and TIM2)
16.10.2 Pulse Accumulator Overflow (PAOVF)
16.10.3 Pulse Accumulator Input (PAIF)
16.10.4 Timer Overflow (TOF)
Advance Information
352
NOTE:
NOTE:
NOTE:
PAOVF is set when the 16-bit pulse accumulator rolls over from $FFFF
to $0000. If the PAOVI bit in TIMPACTL is also set, PAOVF generates
an interrupt request. Clear PAOVF by writing a 1 to this flag.
When the fast flag clear all enable bit, TFFCA, is set, any access to the
pulse accumulator counter registers clears all the flags in TIMPAFLG.
PAIF is set when the selected edge is detected at the PAI pin. In event
counter mode, the event edge sets PAIF. In gated time accumulation
mode, the trailing edge of the gate signal at the PAI pin sets PAIF. If the
PAI bit in TIMPACTL is also set, PAIF generates an interrupt request.
Clear PAIF by writing a 1 to this flag.
When the fast flag clear all enable bit, TFFCA, is set, any access to the
pulse accumulator counter registers clears all the flags in TIMPAFLG.
TOF is set when the timer counter rolls over from $FFFF to $0000. If the
TOI bit in TIMSCR2 is also set, TOF generates an interrupt request.
Clear TOF by writing a 1 to this flag.
When the timer channel 3 registers contain $FFFF and TCRE is set,
TOF never gets set even though the timer counter registers go from
$FFFF to $0000.
When the fast flag clear all bit, TFFCA, is set, any access to the timer
counter registers clears Timer Flag Register 2. The TFFCA bit is in Timer
System Control Register 1 (TIMSCR1).
When TOF is set, it does not inhibit future overflow events.
Freescale Semiconductor, Inc.
For More Information On This Product,
Timer Modules (TIM1 and TIM2)
Go to: www.freescale.com
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
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