MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 254

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Clock Module
Advance Information
254
PLLMODE — Clock Mode Bit
PLLSEL — PLL Select Bit
PLLREF — PLL Reference Bit
LOCKS — Sticky PLL Lock Bit
The MODE bit is configured at reset and reflects the clock mode as
shown in
The PLLSEL bit is configured at reset and reflects the PLL mode as
shown in
The PLLREF bit is configured at reset and reflects the PLL reference
source in normal PLL mode as shown in
PLLMODE:PLLSEL:PLLREF
The LOCKS flag is a sticky indication of PLL lock status.
The lock detect function sets the LOCKS bit when the PLL achieves
lock after:
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = PLL clock mode
0 = External clock mode
1 = Normal PLL mode
0 = 1:1 PLL mode
1 = Crystal clock reference
0 = External clock reference
1 = No unintentional PLL loss of lock since last system reset or
0 = PLL loss of lock since last system reset or MFD change or
– A system reset, or
– A write to SYNCR that changes the MFD[2:0] bits
MFD change
currently not locked due to exit from STOP with FWKUP set
Table
Table
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000
100
110
111
Clock Module
Table 11-5. System Clock Modes
11-5.
11-5.
External clock mode
1:1 PLL mode
Normal PLL mode with external clock reference
Normal PLL mode with crystal oscillator
reference
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
Clock Mode
Table
11-5.
MOTOROLA