MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 145

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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5.6.2 Reset Status Register
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: 0x00c4_0001
Reset:
Read:
Write:
The Reset Status Register (RSR) contains a status bit for every reset
source. When reset is entered, the cause of the reset condition is latched
along with a value of 0 for the other reset sources that were not pending
at the time of the reset condition. These values are then reflected in
RSR. One or more status bits may be set at the same time. The cause
of any subsequent reset is also recorded in the register, overwriting
status from the previous reset condition.
RSR can be read at any time. Writing to RSR has no effect.
LVD — Low-Voltage Detect
SOFT — Software Reset Flag
WDR — Watchdog Timer Reset Flag
This bit indicates that the last reset state was caused by an LVD reset.
SOFT indicates that the last reset was caused by software.
WDR indicates that the last reset was caused by a watchdog timer
timeout.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Last reset state was caused by an LVD reset
0 = Last reset state was not caused by an LVD reset
1 = Last reset caused by software
0 = Last reset not caused by software
1 = Last reset caused by watchdog timer timeout
0 = Last reset not caused by watchdog timer timeout
Bit 7
0
0
Figure 5-3. Reset Status Register (RSR)
Go to: www.freescale.com
= Writes have no effect and terminate without transfer error exception.
Reset Controller Module
LVD
6
SOFT
5
WDR
4
Reset dependent
POR
3
Memory Map and Registers
EXT
2
Reset Controller Module
Advance Information
LOC
1
Bit 0
LOL
145

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