MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 165

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.1 Contents
7.2 Introduction
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Advance Information — MMC2114, MMC2113, and MMC2112
Section 7. M•CORE M210 Central Processor Unit (CPU)
7.2
7.3
7.4
7.5
7.6
7.7
7.8
The M•CORE M210 central processor unit (CPU) architecture is one of
the most compact, full 32-bit core implementations available. The
pipelined reduced instruction set computer (RISC) execution unit uses
16-bit instructions to achieve maximum speed and code efficiency, while
conserving on-chip memory resources. The instruction set is designed
to support high-level language implementation. A non-intrusive resident
debugging system supports product development and in-situ testing.
Total system power consumption is determined by all the system
components, rather than the CPU alone. In particular, memory power
consumption (both on-chip and external) is a dominant factor in total
power consumption of the CPU plus memory subsystem. With this in
mind, the CPU instruction set architecture trades absolute performance
capability for reduced total energy consumption. This is accomplished
while maintaining a high level of performance at a given clock frequency.
Freescale Semiconductor, Inc.
M•CORE M210 Central Processor Unit (CPU)
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Microarchitecture Summary . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Data Format Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
Operand Addressing Capabilities . . . . . . . . . . . . . . . . . . . . . . 172
Instruction Set Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Go to: www.freescale.com
Advance Information
165