MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 498
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
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Queued Analog-to-Digital Converter (QADC)
Advance Information
498
The QADC automatically performs the conversions in the queue until a
pause or an end-of-queue condition is encountered. When a pause
occurs, queue execution stops until the timer interval elapses again, and
queue execution continues. When queue execution reaches an
end-of-queue situation, the single-scan enable bit is cleared. Set the
single-scan enable bit again to allow another scan of the queue to be
initiated by the interval timer.
The interval timer generates a trigger event whenever the time interval
elapses. The trigger event may cause queue execution to continue
following a pause or may be considered a trigger overrun. Once queue
execution is completed, the single-scan enable bit must be set again to
allow the timer to count again.
Normally, only one queue is enabled for interval timer single-scan mode,
and the timer will reset at the end-of-queue. However, if both queues are
enabled for either single-scan or continuous interval timer mode, the
end-of-queue condition will not reset the timer while the other queue is
active. In this case, the timer will reset when both queues have reached
end-of-queue. See
interval timer reset conditions.
The interval timer single-scan mode can be used in applications that
need coherent results. For example:
•
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
When it is necessary that all samples are guaranteed to be taken
during the same scan of the analog pins
When the interrupt rate in the periodic timer continuous-scan
mode would be too high
In sensitive battery applications, where the interval timer
single-scan mode uses less power than the software-initiated
continuous-scan mode
Go to: www.freescale.com
19.10.9 Periodic/Interval Timer
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
for a definition of
MOTOROLA
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