MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 307

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.4 Modes of Operation
15.4.1 Wait Mode
15.4.2 Doze Mode
15.4.3 Stop Mode
15.4.4 Debug Mode
15.5 Signals
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
This subsection describes the three low-power modes and the debug
mode.
In wait mode, the PIT module continues to operate normally and can be
configured to exit the low-power mode by generating an interrupt
request.
In doze mode with the PDOZE bit set in the PIT Control and Status
Register (PCSR), PIT module operation stops. In doze mode with the
PDOZE bit clear, doze mode does not affect PIT operation. When doze
mode is exited, PIT operation continues from the state it was in before
entering doze mode.
In stop mode, the system clock is absent, and PIT module operation
stops.
In debug mode with the PDBG bit set in PCSR, PIT module operation
stops. In debug mode with the PDBG bit clear, debug mode does not
affect PIT operation. When debug mode is exited, PIT operation
continues from the state it was in before entering debug mode, but any
updates made in debug mode remain.
The PIT module has no off-chip signals.
Programmable Interrupt Timer Modules (PIT1 and PIT2)
Freescale Semiconductor, Inc.
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Programmable Interrupt Timer Modules (PIT1 and PIT2)
Advance Information
Modes of Operation
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