MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 452

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Queued Analog-to-Digital Converter (QADC)
Advance Information
452
NOTE:
If BQ2[6:0] was assigned to the CCW that queue 1 is currently working
on, then that conversion is completed before the change to BQ2[6:0]
takes effect.
is selected for queue 1 and a trigger event occurs for queue 1 with
BQ2 set to 0. Queue 1 execution starts momentarily, but is terminated
after CCW0 is read. No conversions occur.
The BQ2[6:0] pointer may be changed dynamically to alternate
between queue 2 scan sequences. A change in BQ2 after queue 2
has begun or when queue 2 has a trigger pending does not affect
queue 2 until it is started again. For example, two scan sequences
could be defined as follows: The first sequence starts at CCW10, with
a pause after CCW11 and an end of queue (EOQ) programmed in
CCW15; the second sequence starts at CCW16, with a pause after
CCW17 and an EOQ programmed in CCW39.
With BQ2[6:0] set to CCW10 and the continuous-scan mode
selected, queue execution begins. When the pause is encountered in
CCW11, an interrupt service routine can retarget BQ2[6:0] to CCW16.
When the end-of-queue is recognized in CCW15, an internal retrigger
event is generated and execution restarts at CCW16. When the
pause software interrupt occurs again, BQ2 can be changed back to
CCW10. After the end-of-queue is recognized in CCW39, an internal
retrigger event is created and execution now restarts at CCW10.
If BQ2[6:0] is changed while queue 1 is active, the effect of BQ2[6:0]
as an end-of-queue indication for queue 1 is immediate. However,
beware of the risk of losing the end-of-queue 1 when changing
BQ2[6:0]. Using EOQ (channel 63) to end queue 1 is recommended.
Each time a CCW is read for queue 1, the CCW location is compared
with the current value of the BQ2[6:0] pointer to detect a possible
end-of-queue condition. For example, if BQ2[6:0] is changed to
CCW3 while queue 1 is converting CCW2, queue 1 is terminated after
the conversion is completed. However, if BQ2[6:0] is changed to
CCW1 while queue 1 is converting CCW2, the QADC would not
recognize a BQ2[6:0] end-of-queue condition until queue 1 execution
reached CCW1 again, presumably on the next pass through the
queue.
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Go to: www.freescale.com
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
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