MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 345

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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16.7.20 Timer Test Register
16.8 Functional Description
16.8.1 Prescaler
16.8.2 Input Capture
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: TIM1 — 0x00ce_001f
The Timer Test Register (TIMTST) is only for factory testing. When not
in test mode, TIMTST is read-only.
Reset:
The timer module is a 16-bit, 4-channel timer with input capture and
output compare functions and a pulse accumulator.
The prescaler divides the module clock by 1, 2, 4, 8, 16, 32, 64, or 128.
The PR[2:0] bits in TIMSCR2 select the prescaler divisor.
Clearing an I/O select bit, IOSx, configures channel x as an input capture
channel. The input capture function captures the time at which an
external event occurs. When an active edge occurs on the pin of an input
capture channel, the timer transfers the value in the timer counter into
the timer channel registers, TIMCxH and TIMCxL.
The minimum pulse width for the input capture input is greater than two
module clocks.
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
TIM2 — 0x00cf_001f
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
Figure 16-25. Timer Test Register (TIMTST)
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
3
0
0
Timer Modules (TIM1 and TIM2)
2
0
0
Functional Description
Advance Information
1
0
0
Bit 0
0
0
345

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