MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 321

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.5 Modes of Operation
16.5.1 Supervisor and User Modes
16.5.2 Run Mode
16.5.3 Stop Mode
16.5.4 Wait, Doze, and Debug Modes
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
This subsection describes the supervisor and user modes, the five
low-power options, and test mode.
The SO bit in the Chip-Select Control Register determines whether the
processor is operating in user mode or supervisor mode. Accessing
supervisor address locations while not in supervisor mode causes the
timer to assert a transfer error. See
Register 0
Clearing the TIMEN bit in the Timer System Control Register 1
(TIMSCR1) or the PAE bit in the Pulse Accumulator Control Register
(TIMPACTL) reduces power consumption in run mode. Timer registers
are still accessible, but all timer functions are disabled. See
Timer System Control Register (TIMSCR1)
Accumulator Control Register
If the central processor unit (CPU) enters stop mode, timer operation
stops. Upon exiting stop mode, the timer resumes operation unless stop
mode was exited by reset.
The timer is unaffected by these low-power modes.
Freescale Semiconductor, Inc.
For More Information On This Product,
Timer Modules (TIM1 and TIM2)
(CSCR0).
Go to: www.freescale.com
(TIMPACTL).
Figure 21-2. Chip Select Control
Timer Modules (TIM1 and TIM2)
and
Figure 16-19. Pulse
Advance Information
Modes of Operation
Figure 16-8.
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