MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 368
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Serial Communications Interface Modules (SCI1 and SCI2)
Advance Information
368
Serial Communications Interface Modules (SCI1 and SCI2)
NF — Noise Flag
FE — Framing Error Flag
PF — Parity Error Flag
The NF flag is set when the SCI detects noise on the receiver input.
NF is set during the same cycle as the RDRF flag but does not get set
in the case of an overrun. Clear NF by reading SCISR1 and then
reading SCIDRL. Reset clears NF.
The FE flag is set when a logic 0 is accepted as the stop bit. FE is set
during the same cycle as the RDRF flag but does not get set in the
case of an overrun. FE inhibits further data reception until it is cleared.
Clear FE by reading SCISR1 and then reading SCIDRL. Reset clears
FE.
The PF flag is set when PE = 1 and the parity of the received data
does not match its parity bit. Clear PF by reading SCISR1 and then
reading SCIDRL. Reset clears PF.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Noise
0 = No noise
1 = Framing error
0 = No framing error
1 = Parity error
0 = No parity error
Go to: www.freescale.com
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
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